Over the last half century or so, the electronics industry has relied on silicon as the foundation for all electronics-based products. To accommodate exponential growth demands for larger and faster transistors, chip designers and manufacturers have constantly pushed the envelope of technological, physical, and design constraints. Various innovations and paradigm-defining ideas have taken shape as a result. The Silicon-on-Insulator (SOI) concept is one significant trend in this context. SOI can deliver the headroom necessary to continue pushing the envelope for at least the next five years.
According to a soon-to-be-released report from Business Communications Company, Inc, RGB-295 Silicon-on-Insulator: Technology and Markets, despite the technology economy meltdown in the last few years, wafer demand has been on the strong side from an overall recovery perspective. The ramp-up of 300 mm wafer demand has driven steady growth, resulting in a 34.2% surge in 2003 over 2002. This steep-trending growth is likely to be repeated, as the market grows at an average annual growth rate (AAGR) of 36.2%, increasing from $212 million in 2003 to $992 million by 2008. On an MSI (millions of square inch) basis, the SOI merchant wafer market is expected to expand at an AAGR of 34.5% from 40.6 in 2003 to 178.9 in 2008.
There are two primary categorizations of SOI-based wafers. Thin-film SOI wafers (silicon film thickness of less than 1 micron) are manufactured with several different types of manufacturing technologies, all of which are patented. SIMOX utilizes ion implantation in the formation of the silicon dioxide layer; subsequent annealing is done to create the SOI structure. The newest class of materials is derived from bonded wafer technology used in thick-film SOI, but offers the major advantage of only consuming a single wafer through the use of novel cleaving techniques. Thin-film SOI is currently the main focus of a few big guns, such as Soitec, Ibis, and Canon. The thin-film SOI segment is the key product market driver, and is expected to grow at an AAGR of 41.8% to reach $794 million by 2008. In terms of units, this segment is expected to grow at an AAGR of 37.6% through the forecast period.
Thick-film SOI wafers (silicon film thickness of greater than 1 micron) are manufactured by traditional wafer bonding and etch back (mechanical and chemical) processes. Silicon film thickness ranges from 1-5 microns based on applications, including MEMS, opto-electronic, and high-voltage electronics. In terms of vendors, a number of small venture companies are into thick-film SOI-based manufacturing. The thick-film market is also increasing, albeit at a relatively modest AAGR of 22%. The lackluster and mature device market affects its trend line. The thick-film market is waiting to reap benefits from growing demand for automotive and intelligent power devices.
As the industry moves toward the era of the 300 mm wafer generation, cost reduction per chip will progress significantly to allow SOI device applications to expand from the midrange to the low-end segment. In particular, as the needs of the full depletion layer SOI device arise and vendors intensify development and production activities, 300 mm ultra-thin-film wafer demand will gain an impetus. While 300 mm SOI wafer prices remain lofty, the anticipated improvement of production techniques will likely lower the material cost per unit area below that for 200 mm wafers in the long term. Coupling this cost decrease with an increase in chip count per wafer, the shift to 300 mm wafers will help reduce SOI device ASPs, allowing applications to expand from the less cost-sensitive midrange to the low end.