Inverter technology is the key to cost-effective and efficient motor drives. The problem, however, is its high cost. As a solution, Fairchild has developed a broad range of SPM™ (Smart Power Modules) tailored to variable speed drives. SPM series are designed to bring customers both high performance and lower cost, and to make electronic motor drives efficient, compact, easy and fast to design, rugged, and less risky.
Introduction
Concerns about the environment and energy conservation have resulted in new regulations and recommendations from government agencies throughout the world. Low power drives both in consumer appliance and general industrial applications have shown a rapid growth in recent years, increasing the need for low power modules. SPM has established a dominant position in these application areas with its compactness, functionality, reliability, and ease of user interface.
From 1999, when the SPM series was first developed, to the present, Fairchild has manufactured millions of 600 V SPM series with the power range of 400 W~3.7 kW in consumer appliances and low power general industry applications.
This article details the SPM design concept and its implementation of semiconductor (power devices and control ICs) technology, package technology, and system technology mainly through the newly developed SPM3 and SPM5. Benefits of using SPM inverters will also be discussed.
SPM Design Concept
The key SPM design concept is to create a low power module with improved reliability achieved by applying the existing IC and LSI transfer mold packaging technology to the SPM. SPM structure is relatively simple: power chips and IC chips are directly die bonded on the copper lead frame; the bare ceramic material is attached to the frame, and then molded into epoxy resin. In comparison, the IPM is made of power chips bonded on the metal or ceramic substrate and the ICs and passive components assembled on the PCB, which in turn is assembled into a plastic or epoxy resin case and then filled up with silicon gel. The SPM greatly minimizes the number of parts and material types, optimizing assembly process and overall cost.
The photograph shows SPM3, to the left, and to the right, SPM5. Their relative sizes are shown next to a U.S. quarter coin.
The second important design concept is the implementation of a product with smaller size but higher power rating. Of the low power modules released to date, SPM3 has high power density with a 3 A~30 A rated product built into a single package outline.
The third design concept is user design flexibility to enable use in a wide range of applications. For example, there are two major flexibility features in the SPM3 series. First is the 3-N terminal structure where the IGBT inverter bridge emitter terminal is separated. In this type of structure, shunt resistance can be used in each 3-N terminal to easily detect inverter phase current. Second is high-side IGBT switching dv/dt control made possible by the insertion of appropriate impedance cell in the SPM. Depending on how the impedance cell is designed, the high-side switching slope can be adjusted so that critical EMI problems may be easily dealt with.
The internal block diagrams of the SPM3 and SPM5 are shown here. SPM3 is a 3-phase IGBT inverter with 3 HVICs, 1 LVIC, 6 IGBTs and 6 FRDs. SPM5 is a 3-phase MOSFET inverter optimally designed for use with low power applications. It has 6 power MOSFETs and 3 half bridge drive ICs built in.
The detailed features and integrated functions of SPM3 and SPM5 are as follows:
Features of SPM3
- 600 V/3 A to 30 A rating in one package (with identical mechanical layouts)
- Low-loss efficient IGBTs and FRDs optimized for motor drive applications
- High reliability due to fully tested coordination of HVIC and IGBTs
- 3-phase IGBT inverter bridge including control ICs for gate driving and protection;
High-side: Control circuit under voltage (UV) protection (without fault signal output);
Low-side: UV and short-circuit (SC) protection through external shunt resistor (with fault signal output)
- Single-grounded power supply and opto-coupler-less interface due to built-in HVIC
- High-active input signal logic resolves the startup and shutdown sequence constraint between the control supply and control input providing fail-safe operation with direct connection between the SPM and a 3.3 V CPU or DSP. Additional external sequence logic is not needed
- Divided negative DC-link terminals for inverter current sensing applications
- Isolation voltage rating of 2,500 Vrms/min
- Very low leakage current due to ceramic heat-sink and DBC substrate.
Features of SPM5
- 500 V, 0.5 A, 1 A, and 250 V 1 A rating, 3-phase MOSFET inverter bridge including control ICs for gate driving
- High reliability due to fully tested coordination of HVIC and MOSFETs
- Single-grounded power supply and opto-coupler-less interface due to built-in HVIC
- High-active input signal logic resolves the startup and shutdown sequence constraint between the control supply and control input providing fail-safe operation with direct connection between the SPM and a 3.3 V CPU or DSP. Additional external sequence logic is not needed
- 3 divided negative DC-link terminals for inverter current sensing applications
- Typical switching frequency of 15kHz
- Isolation voltage rating of 1500Vrms/min.
SPM Technology
A. Semiconductor Technology
POWER Devices -- IGBT, FRD and MOSFET: The performance upgrade of SPM3, which consists of 3-phase IGBT inverter circuits, is basically the result of technological development of power devices (IGBT and FRD). The fundamental design rule of power devices is the reduction of chip size and the increase of current density. The IGBT applied to SPM was newly developed by Fairchild. Through optimized PT planar IGBT design, it maintains the SOA (Safe Operating Area) suitable for motor control application while dramatically reducing the on-state loss (VCEYSAT = 1.6 V) and turn-off loss (EOFF = 60microJ @25°C). It also implements smooth switching performance without sacrificing other characteristics. The FRD is a hyperfast diode that has low forward voltage drop (an important factor in inverter applications) along with soft recovery characteristics.
In the 3-phase MOSFET inverter SPM5, the MOSFET''s internal body diode is used as a free-wheeling diode for the implementation of a more compact structure. The MOSFET used in SPM5 was primarily designed to have outstanding body diode recovery characteristics as well as the implementation of noise immunity and switching performance for motor control application. By optimizing gate resistance, dV/dt was implemented at below 2 kV/microsec to suppress the resonance of gate signal and to reduce EMI.
Control IC -- LVIC, HVIC: In the SPM inverter, the HVIC and LVIC were designed to have only the minimum necessary function suitable for low power inverter drive. The HVIC has a built-in high voltage level shift function that enables the ground referenced PWM signal to be sent directly to the SPM''s assigned high side IGBT gate circuit. This built-in function enables opto-coupler-less interface, making it possible to design a very simple system. In addition, with a built-in under-voltage lockout (UVLO) protection function, it interrupts IGBT operation under control supply under-voltage conditions. Because the charge-pump mode, which interlocks to the low-side PWM outside of the SPM, can be used as the high-side driving power, it can be driven with a 15 V single control supply. This is not necessary to have three isolated voltage sources for the high-side gate drive used in inverter systems that use conventional power modules.
Recent progress in the HVIC technology includes chip downsizing through the introduction of wafer fine process technology, input logic change from the conventional low active to high active permitting direct drive by 3 V feed microcontroller or DSP, low circuit current, increased noise immunity, and good performance stability against temperature variation.
B. Package Technology
Since heat dissipation is an important factor limiting the power module''s current capability, the heat dissipation characteristic of a package is critical in determining SPM performance. A tradeoff exists between heat dissipation characteristic and isolation characteristic. The key to a good package technology lies in the implementation of outstanding heat dissipation characteristic without compromising the isolation rating.
In SPM3, a technology was developed in which bare ceramic with good heat dissipation characteristics is attached directly to the lead frame. For expansion to a targeted power rating of 20 A/30 A within a single package, DBC (Direct Bonding Copper) technology was applied. This made it possible to achieve optimum tradeoff characteristics while maintaining cost-effectiveness.
In SPM5, special epoxy resin was used with optimized thermal conductivity and insulation characteristic. At the same time, the thickness of the insulation layer, which is also composed of resin, has been carefully optimized to meet the required specification both in terms of insulation level and thermal resistance.
Shown here are cross sections of the SPM3 and SPM5 package. As seen in (a), the lead frame structure was bent to secure the required electrical spacing. In (b), the lead frame and the DBC substrate are being directly soldered in the DBC-SPM3.
C. Inverter System Technology
The package has been designed to satisfy the basic creepage and clearance spacing-related safety regulations (UL, IEC, etc.) required in inverter systems. In SPM3, 3 mm creepage and 4 mm clearance was secured in all areas where high voltage is applied. In addition, the Cu frame pattern and wire connection have been optimized with the aid of computer simulation for less parasitic inductance, which is favorable to the suppression of voltage surge at high frequency switching operation.
HVIC is sensitive to noise since it is not a complete galvanic isolation structure but is implemented as a level shift latch logic using high voltage LDMOS that passes signals from upper side gate and lower side gate. Consequently, it was designed with sufficient immunity against such possible malfunctions as latch-on, latch-up, and latch-off caused by IGBT switching noise and system outside noise. Fairchild''s SPM design also takes into consideration the possibility of high side malfunction caused by short PWM pulse. Since the low voltage part and the high voltage part are configured onto the same silicon in the HVIC, it cannot operate normally when the electric potential in the high voltage part becomes lower than the ground of the low voltage part. Accordingly, sufficient margin was given to take into account the negative voltage level that could cause such abnormal operation. Soft turnoff function was added to secure basic IGBT SOA (Safe Operating Area) under short circuit conditions.
Advantage of SPM-inverter Drives
A. SPM Inverter Engine Platform
SPM3 was designed to have 3 A~30 A rated products built into a single package outline. Shown here is the junction to case thermal resistance at each current range of the SPM3. As seen in the figure, in the 20 A and 30 A range, intelligent 3-phase IGBT module with high power density (Size vs. Power) was implemented. Accordingly, in the low power range, inverter system designers are able to cover almost the entire range of 0.1 kW~2.2 kW rating in a single power circuit design using SPM3. Since circuitry and tools can become more standardized, product development and testing process are simplified, significantly reducing development time and cost. Through control board standardization, overall manufacturing cost will be substantially reduced as users are able to simplify materials purchasing and maintain manufacturing consistency.
B. Noise Reduction
Small package and low power loss are the primary goals of low power modules. However, in recent years, attempting to reduce power loss through excessively fast switching speed has given rise to various challenges. Excessive switching speed increases the dV/dt, di/dt, and recovery current and creates challenges such as large EMI (Electromagnetic Interference), excessive surge voltage, and high magnitude of motor leakage current. Such problems increase system cost and can even shorten motor life. SPM series solve these problems by adjusting the switching dV/dt to below 3 kV/usec (typical) through advanced gate drive impedance design.
Thanks to very low on-state voltage of the new generation IGBT and low forward voltage of FRD, an optimized switching speed meeting the low EMI requirement has been realized in SPM while keeping the total power loss at a low level equal to or less than other low power modules.
C. Cost-effective Current Detection
As sensorless vector control and other increasingly sophisticated control methods are applied to general industrial inverters and even in consumer appliance inverters, there is a growing need to measure inverter phase current. SPM family has a 3-N terminal structure in which IGBT inverter bridge emitter terminal is separated. In this type of structure, inverter phase current can be easily detected simply by using external shunt resistance.
D. High Reliability
The wire-to-chip junctions and the chip-to-frame junctions have been enforced in a transfer mold package to make it endure severe thermal stress. In particular, the wire-to-chip junction endurance against steep temperature swing caused by rapid load variation has been substantially improved. Power cycle results show that SPM is capable of over 10 million power cycles at an average chip junction temperature swing of 25°C. This makes SPM suitable not only for home appliances, which usually work under a relatively constant load, but also for a typical servo operation characterized by frequent and dramatic load changes.
Conclusion
Today, SPM has positioned itself as a strong inverter solution in low power motor control. With its compact size, optimized performance, high reliability, and low cost, the SPM family is accelerating the inverterization not only of low power industry applications but also of consumer appliances. Fairchild will continue its effort to develop the next generation of SPMs optimized for a wider variety of applications and with higher power rating in mind.